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Solving the interconnect bottleneck. Optoelectronic FPGAs
- Source :
- 1998 IEEE/LEOS Summer Topical Meeting. Digest. Broadband Optical Networks and Technologies: An Emerging Reality. Optical MEMS. Smart Pixels. Organic Optics and Optoelectronics (Cat. No.98TH8369).
- Publication Year :
- 2002
- Publisher :
- IEEE, 2002.
-
Abstract
- The term smart-pixel architectures usually refers to systems that consist of optically connected electronic planes, having a regular two-dimensional structure, and in which the electronics form a high-performance array processing structure. We use the term smart-pixel interconnect to designate an optical interconnect that consists of a massive number of light sources or detectors placed on a two-dimensional grid, that interconnect to a similar array located on the surface of a neighboring chip. We do not imply any dedicated nature of the underlying electronics. Such smart-pixel interconnects are being considered as a possible way to solve or alleviate the rapidly worsening interconnect problems of VLSI.
- Subjects :
- Very-large-scale integration
Interconnection
business.industry
Computer science
Optical interconnect
Electrical engineering
Array processing
Interconnect bottleneck
Chip
Computer Science::Hardware Architecture
Embedded system
Hardware_INTEGRATEDCIRCUITS
Electronics
business
Field-programmable gate array
Subjects
Details
- Database :
- OpenAIRE
- Journal :
- 1998 IEEE/LEOS Summer Topical Meeting. Digest. Broadband Optical Networks and Technologies: An Emerging Reality. Optical MEMS. Smart Pixels. Organic Optics and Optoelectronics (Cat. No.98TH8369)
- Accession number :
- edsair.doi...........8b70b759eb493cd3df61bcd6b984c41e