Modeling and analysis of inter-symbol interference (ISI) jitter

This paper presents a novel modeling and analysis of inter-symbol interference (ISI)jitter in serial data channels either between chips or on chip. The simulation results show that ISI jitter is dependent on pole location, settling time, and damping ratio of the data serial channel. Based on the proposed ISI jitter model, the effect of the ISI jitter on other jitter components is illustrated along with realistic simulation results.