A 0.13-µm CMOS PCSNIM LNA for Multi-Standard 0.9, 1.8, and 2.1 GHz Mobile Application

This work is on the design of a fully integrated 0.13-µm CMOS multi-standard power constrained simultaneous noise and input matching low-noise amplifier (PCSNIM LNA). The multi-standard capability is obtained via the implementation of CMOS switches. The input and output matching are fully implemented on a chip, which is uncommon when compared to the existing multi-standard LNA topologies. The multi-standard LNA is operated at 0.9, 1.8, and 2.1 GHz frequencies. The design covered wireless standards of GSM900, DCS1800, and W-CDMA applications. The multi-standard LNA can obtain noise figure as low as 1.72 dB. The third-order intercept point, IIP3, is as high as −4 dBm, while IP1dB is −10 dBm. The power consumption of the design is only 7.4 mW. This resistorless multi-standard LNA design is not just able to operate at three different frequencies but also has a comparable performance with the rest. Its merits are contributed by high linearity and low power.