Scaling of Split-Gate Flash Memory with 1.05V Select Transistor for 28 nm Embedded Flash Technology

This paper discusses the performance and reliability of the third generation split-gate flash memory cell (ESF3) successfully embedded in a high performance and low power 28 nm logic process technology. The scaling of the 1.05V select transistor is demonstrated with the excellent program and erase efficiency and the 1M program/erase (P/E) cycle endurance capability. The silicon result of a 4Mb test chip and a 32Mb design will be also be shown.