A switched-capacitor interface circuit for integrated sensor applications

A new switched-capacitor interface circuit with differential-input single-ended output (DISO) for integrated sensor applications is presented. The circuit adopts the correlated double sampling technique combined with the auxiliary amplifier structure to cancel the 1/f noise and to minimize the systematic offset and errors due to charge injection. The simulated results show that the circuit exhibits a DC offset of 7 /spl mu/V and consumes 620 /spl mu/A at a single 5 V supply, with a sample rate 128 kHz in 0.8 /spl mu/m CMOS technology.