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Application of the 1-D silicon limit to varactors

Authors :
R.J. Havens
W.D. van Noort
Angel Rodríguez
Peter Deixler
Source :
IEEE Transactions on Electron Devices. 53:1601-1607
Publication Year :
2006
Publisher :
Institute of Electrical and Electronics Engineers (IEEE), 2006.

Abstract

Solid-state varactor performance is evaluated in light of fundamental tradeoffs imposed by semiconductor material. This leads to the important conclusion that the product of Q factor, frequency, tuning range, and breakdown voltage has an upper limit (between 5 and 40 THzmiddotV for silicon) that is dictated primarily by semiconductor material parameters, and to a lesser degree on doping level and temperature. This limit is then approached by experimental hyperabrupt profiles with a product of 17 THzmiddotV that were fabricated in a SiGe BiCMOS process. Two complementary analysis techniques based on LCR and high-frequency measurements are presented

Details

ISSN :
00189383
Volume :
53
Database :
OpenAIRE
Journal :
IEEE Transactions on Electron Devices
Accession number :
edsair.doi...........7e8d9c48df40ff6b00b6d05a613bc6eb
Full Text :
https://doi.org/10.1109/ted.2006.875814