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Analysis of Impedance & Supply Noise for Power Distribution Networks in IC Using CM

Authors :
V. Kulotharasan
M. Gayathri
Source :
International Journal of Communication and Networking System. 5:40-42
Publication Year :
2015
Publisher :
Integrated Intelligent Research (IIR), 2015.

Abstract

With increasing design complexity, as well as continued scaling of supplies, the design and analysis of power distribution networks poses a difficult problem in modern IC design. We propose several closed-form solutions for power distribution network optimization and analysis which explicitly take into consideration the mesh topology. An RLC model for on-chip power distribution networks is presented for array and wire bonded integrated circuits including inter block decoupling capacitors and impedances. One of the more common design techniques for power distribution networks PDN is the determination of the impedance & supply noise. Current-mode technique is used. By using this current mode technique noise and impedance, voltage is analyzed.

Details

ISSN :
22782427
Volume :
5
Database :
OpenAIRE
Journal :
International Journal of Communication and Networking System
Accession number :
edsair.doi...........756c4f43832af57dac911985635c2abe
Full Text :
https://doi.org/10.20894/ijcnes.103.005.001.011