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Interface morphology of thermal oxide grown on polycrystalline silicon by different processes

Authors :
H. Yen
Rashid Bashir
Gerold W. Neudeck
Eric P. Kvam
S. Venkatesan
Source :
Proceedings, annual meeting, Electron Microscopy Society of America. 50:1396-1397
Publication Year :
1992
Publisher :
Cambridge University Press (CUP), 1992.

Abstract

Polycrystalline silicon, when highly doped, is commonly used in microelectronics applications such as gates and interconnects. The packing density of integrated circuits can be enhanced by fabricating multilevel polycrystalline silicon films separated by insulating SiO2 layers. It has been found that device performance and electrical properties are strongly affected by the interface morphology between polycrystalline silicon and SiO2. As a thermal oxide layer is grown, the poly silicon is consumed, and there is a volume expansion of the oxide relative to the atomic silicon. Roughness at the poly silicon/thermal oxide interface can be severely deleterious due to stresses induced by the volume change during oxidation. Further, grain orientations and grain boundaries may alter oxidation kinetics, which will also affect roughness, and thus stress.Three groups of polycrystalline silicon films were deposited by LPCVD after growing thermal oxide on p-type wafers. The films were doped with phosphorus or arsenic by three different methods.

Details

ISSN :
26901315 and 04248201
Volume :
50
Database :
OpenAIRE
Journal :
Proceedings, annual meeting, Electron Microscopy Society of America
Accession number :
edsair.doi...........7320a7d9f1453ab6142623415b18e77f