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A single-chip MPEG2 video decoder LSI
- Source :
- Proceedings of IEEE International Solid-State Circuits Conference - ISSCC '94.
- Publication Year :
- 2002
- Publisher :
- IEEE, 2002.
-
Abstract
- This MPEG2 video decoder LSI decodes MPEG2 standard bit streams. The compression algorithm in the MPEG2 is based on discrete cosine transform (DCT), variable length coding, and motion compensation similar to the MPEG1, the earlier standard. However, the processing speed should be more than four times faster than MPEG1. Moreover, several algorithms and structures to handle interlaced pictures are added to the MPEG1 standard. This LSI decodes in real time all motion-compensation modes and picture structures in MPEG2 bit streams of not only CCIR601 but also HDTV resolution. >
- Subjects :
- Motion compensation
business.industry
Computer science
Motion estimation
Video decoder
ComputingMethodologies_IMAGEPROCESSINGANDCOMPUTERVISION
Discrete cosine transform
ComputerSystemsOrganization_SPECIAL-PURPOSEANDAPPLICATION-BASEDSYSTEMS
business
Computer hardware
Decoding methods
Data compression
Subjects
Details
- Database :
- OpenAIRE
- Journal :
- Proceedings of IEEE International Solid-State Circuits Conference - ISSCC '94
- Accession number :
- edsair.doi...........7176aebc1b6a53ed2eac1afba3ee930e