Back to Search
Start Over
W-ERA: One-Time Memory Repair with Wafer-Level Early Repair Analysis for Cost Reduction
- Source :
- ITC-Asia
- Publication Year :
- 2020
- Publisher :
- IEEE, 2020.
-
Abstract
- Since the probability of fault occurrence on memory has increased with the advance of memory density and capacity, memory repairs in wafer-level and package-level are widely used with redundancy analysis (RA) to improve memory yield. However, as the costs for memory repair also have increased in proportion to the memory density and capacity, the repair costs have occupied a significant portion of the total costs. To address the problem, one-time memory repair with wafer-level early repair analysis (W-ERA) for cost reduction is proposed in this paper. The proposed W-ERA facilitates that all unrepairable memories are classified rapidly without searching memory repair solutions in wafer-level and repairable memory faults occurred in wafer-level are repaired in package-level with additional faults occurred in package-level simultaneously. It means, as the costs of memory repair can be highly reduced since memory repair is skipped in wafer-level, the total costs also can be highly reduced. In addition, memory redundancies can be efficiently used for memory repair in package-level and it results a high repair rate achievement.
- Subjects :
- Repair time
Hardware_MEMORYSTRUCTURES
Fault occurrence
Total cost
Computer science
Memory faults
020206 networking & telecommunications
02 engineering and technology
Repair rate
020202 computer hardware & architecture
Reliability engineering
Cost reduction
0202 electrical engineering, electronic engineering, information engineering
Redundancy (engineering)
Subjects
Details
- Database :
- OpenAIRE
- Journal :
- 2020 IEEE International Test Conference in Asia (ITC-Asia)
- Accession number :
- edsair.doi...........711c3cb7e80beeb18ffd9a0bf484c59d