CMOS low-noise amplifier with VPW matching elements for 60-GHz-band Gbit/s wireless systems

A 90-nm CMOS single-stage low-noise amplifier with vertical planar waveguide (VPW) matching elements for use in millimeter-wave (mmW) transceivers has been developed and tested. The experimental results showed a noise figure of less than 4.1 dB and a gain higher than 10 dB in a frequency range of 57–58 GHz, and an input third-order intercept (IIP3) point greater than 3 dBm. The measured power consumption is 15.2 mW from a 1.5V supply. The proposed design is well suited for multi-gigabit mmW wireless systems.