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Future device scaling - Beyond traditional CMOS

Authors :
Ian R. Post
I. Ban
C. Auth
Tahir Ghani
P. Chang
K. Kuhn
S. Tyagi
R. Chau
Jack Portland Kavalieros
J. Maiz
Kaizad Mistry
C.-H. Jan
Source :
2009 2nd International Workshop on Electron Devices and Semiconductor Technology.
Publication Year :
2009
Publisher :
IEEE, 2009.

Abstract

Device scaling is critical for continuing trend of more functionality in a chip. Traditional planar CMOS scaling is increasingly difficult due to limitations in processing and material properties, device structure and reliability. In this paper we will summarize recent advances in these areas, which will enable technology scaling as per Moore's law.

Details

Database :
OpenAIRE
Journal :
2009 2nd International Workshop on Electron Devices and Semiconductor Technology
Accession number :
edsair.doi...........6d99e18ca44c7e4be262e70091e0c978
Full Text :
https://doi.org/10.1109/edst.2009.5166098