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Quasi-Equal Clock Reduction On-the-Fly
- Source :
- Lecture Notes in Computer Science ISBN: 9783030763831, NFM
- Publication Year :
- 2021
- Publisher :
- Springer International Publishing, 2021.
-
Abstract
- For timed automata, there is the notion of quasi-equal clocks. Two clocks are quasi-equal if, in each reachable configuration, they are equal or at least one has value 0. There are approaches to exploit quasi-equality of clocks to speed up reachability checking for timed automata. There is a procedure to detect quasi-equal clocks and a syntactical transformation of networks of timed automata where quasi-equal clocks are encoded by one representative clock and one boolean token per clock.
- Subjects :
- Speedup
On the fly
Computer science
Value (computer science)
0102 computer and information sciences
02 engineering and technology
Security token
01 natural sciences
Automaton
Reduction (complexity)
Computer Science::Hardware Architecture
Transformation (function)
010201 computation theory & mathematics
Reachability
ComputerSystemsOrganization_MISCELLANEOUS
0202 electrical engineering, electronic engineering, information engineering
020201 artificial intelligence & image processing
Hardware_ARITHMETICANDLOGICSTRUCTURES
Arithmetic
Computer Science::Formal Languages and Automata Theory
Subjects
Details
- ISBN :
- 978-3-030-76383-1
- ISBNs :
- 9783030763831
- Database :
- OpenAIRE
- Journal :
- Lecture Notes in Computer Science ISBN: 9783030763831, NFM
- Accession number :
- edsair.doi...........6cfa24795236d48038a62b3064c9ec69