Error Control Scheme of Hybrid ARQ Based on Majority Voting Bit by Bit

A hybrid ARQ scheme based on the conception of majority voting for binary linear block codes over AWGN channel is presented. At each transmission, the received word is kept in memory buffers. After a number of receptions, the decoding process first determines each bit as 1 or 0 based on the majority of the corresponding bits in the received words. The word resulting from voting is then decoded by algebraic decoder as the output code word. Simulation results show that the proposed hybrid ARQ scheme outperforms ARQ scheme in both error-correcting performance and throughput efficiency, particularly under low SNR. Additionally, a criterion in measure of throughput and coding gain is proposed for overall evaluation of hybrid ARQ schemes compared to ARQ scheme.