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6.4 Single-shot 200Mfps 5×3-aperture compressive CMOS imager

Authors :
Taishi Takasawa
Keita Yasutomi
Shin-ichiro Okihara
Futa Mochizuki
Bo Zhang
Keiichiro Kagawa
Min-Woong Seo
Shoji Kawahito
Source :
ISSCC
Publication Year :
2015
Publisher :
IEEE, 2015.

Abstract

Ultra-high-speed cameras are a powerful tool for biology as well as physics and mechanics to analyze the process of ultra-high-speed phenomena. The frame rate of the state-of-the-art burst-readout ultra-high-speed silicon imagers has reached approximately 20Mfps [1,2]. To observe faster phenomena such as plasma generation in laser processing, the state of electrons in a chemical reaction, and so on, much faster cameras are desired. There are several factors that prevent the speed-up of the ultra-high-speed imager: high gate control voltages and high power dissipation for high-efficiency multi-stage charge transfer in CCD imagers, and the current density limit of the power and ground lines and RC-constant of the vertical readout lines in CMOS imagers. Computational imaging can be a promising option to break the design limit of solid-state ultra-high-speed imagers. Several dedicated CMOS imagers have been demonstrated [3,4]. This paper presents a demonstration of a single-chip ultra-high-speed multi-aperture CMOS imager based on compressive sampling. The imager performs single-shot burst-readout image acquisition at a frame rate of 200Mfps.

Details

Database :
OpenAIRE
Journal :
2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers
Accession number :
edsair.doi...........69ca26b726352c7542632a0dac78eb4a