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High-Speed Schottky-Barrier pMOSFET With<tex>$f_T = 280 hbox GHz$</tex>

Authors :
John M. Larson
Bruce Wheeler
Craig L. Keast
Peter W. Wyatt
D.-R. Yost
C. L. Chen
John P. Snyder
S. Calawa
Michael Fritze
Source :
IEEE Electron Device Letters. 25:220-222
Publication Year :
2004
Publisher :
Institute of Electrical and Electronics Engineers (IEEE), 2004.

Abstract

High-speed results on sub-30-nm gate length pMOSFETs with platinum silicide Schottky-barrier source and drain are reported. With inherently low series resistance and high drive current, these deeply scaled transistors are promising for high-speed analog applications. The fabrication process simplicity is compelling with no implants required. A sub-30-nm gate length pMOSFET exhibited a cutoff frequency of 280 GHz, which is the highest reported to date for a silicon MOS transistor. Off-state leakage current can be easily controlled by augmenting the Schottky barrier height with an optional blanket As implant. Using this approach, good digital performance was also demonstrated.

Details

ISSN :
07413106
Volume :
25
Database :
OpenAIRE
Journal :
IEEE Electron Device Letters
Accession number :
edsair.doi...........68aa8e0371e1ecdbca394497629fe30b
Full Text :
https://doi.org/10.1109/led.2004.826294