Performance-constrained analogue layout retargeting and optimisation with geometric programming

Layout parasitic has crucial influence on the performance of analogue integrated circuits. The paper presents a performance-constrained analogue layout retargeting and optimisation scheme. Geometric programming (GP), is a kind of nonlinear optimisation problem, is used in the method, which can be transferred or fitted into a convex optimisation problem based on mathematical analyses. Then, a global optimum solution can be achieved. To achieve the desired circuit performance, performance sensitivities based on layout parasitic are carried out in the analogue layout optimisation. In addition, a central difference method is applied to control parasitic-related layout geometries by constructing a set of performance constraints subject to maximum performance deviation. At last, a two-stage Miller-compensated operational amplifier and a single-ended folded cascode operational amplifier are simulated with the proposed scheme. The automatically generated target layouts can satisfy performance constraints to ensur...