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Design of Novel 300-V Field-MOS FETs With Low on-Resistance for Analog Switch Circuits

Authors :
T. Oshima
J. Noguchi
Y. Hayashi
M. Yoshinaga
Tomoyuki Miyoshi
S. Wada
T. Tominari
Source :
IEEE Transactions on Electron Devices. 60:354-359
Publication Year :
2013
Publisher :
Institute of Electrical and Electronics Engineers (IEEE), 2013.

Abstract

Novel 300-V Field-MOS FETs were developed for high-voltage analog switch circuits. The breakdown voltages of the Field-NMOS/PMOS FETs were 410 V/370 V with the specific on-resistance of 1850/11 000 mΩ·mm2 . The vertical and lateral electric fields were both optimized to maximize the breakdown voltage over a wide range of substrate voltages; the device layout optimization included adjusting the silicon-on-insulator thickness and the use of a deep well and a field plate. A low specific on-resistance was obtained as a result of using an extended-drain layer, in addition to the potential linearity of the current pathway in the drift region. This technology can be applied to 300-V analog switch ICs that need to have a low leakage current and a low switching resistance.

Details

ISSN :
15579646 and 00189383
Volume :
60
Database :
OpenAIRE
Journal :
IEEE Transactions on Electron Devices
Accession number :
edsair.doi...........6386833c93840f6f6408a8f7c57d5183