Multi-aperture high-speed CMOS imager

To achieve ultra-high-speed image sensing faster than 1-giga frames per second, a multi-aperture high-speed imager is proposed. In this paper, the architecture of the imager and a design of digital circuits are presented. Basic operations of the digital circuits are verified by a fast SPICE simulator, NanoSim by Synopsys. Arbitrary shutter pattern of 128 bits and the number of repetition can be reprogrammed. A shutter pattern generation at 100 MHz is successfully verified.