Spacer Engineering in Negative Capacitance FinFETs

MLA

Jiuren Zhou, et al. “Spacer Engineering in Negative Capacitance FinFETs.” IEEE Electron Device Letters, vol. 40, June 2019, pp. 1009–12. EBSCOhost, https://doi.org/10.1109/led.2019.2911104.

APA

Jiuren Zhou, Harshit Agarwal, Yen-Kai Lin, Chenming Hu, Yu-Hung Liao, Ming-Yen Kao, Avirup Dasgupta, Sayeef Salahuddin, & Pragya Kushwaha. (2019). Spacer Engineering in Negative Capacitance FinFETs. IEEE Electron Device Letters, 40, 1009–1012. https://doi.org/10.1109/led.2019.2911104

Chicago

Jiuren Zhou, Harshit Agarwal, Yen-Kai Lin, Chenming Hu, Yu-Hung Liao, Ming-Yen Kao, Avirup Dasgupta, Sayeef Salahuddin, and Pragya Kushwaha. 2019. “Spacer Engineering in Negative Capacitance FinFETs.” IEEE Electron Device Letters 40 (June): 1009–12. doi:10.1109/led.2019.2911104.