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Nanowire-Based Anisotropic Conductive Film: A Low Temperature, Ultra-fine Pitch Interconnect Solution

Authors :
Alan Mathewson
Kafil M. Razeeb
Jing Tao
Source :
IEEE Nanotechnology Magazine. 9:4-11
Publication Year :
2015
Publisher :
Institute of Electrical and Electronics Engineers (IEEE), 2015.

Abstract

Advanced microelectronics packaging, driven by the multiple benefits of system performance, power, size, and cost, has now entered the three-dimensional (3-D) era. According to the International Technology Roadmap for Semiconductors 2012 [1], the interconnect pitch size is predicted to be 4?16 ?m at the global interconnect level by the year 2018. Silicon die incorporated with through-silicon-via (TSV) technology [2] can be stacked using solder microbumps as high-density interconnects [3]. However, solder microbump technology faces many challenges because of the intermetallic compound growth and an underfill requirement as the bump size reduces [4]. Meanwhile, the temperature of the soldering process is more than 260 ?C, which can result in high thermal stress in the devices and impact the thermal budget of the processing, particularly for the multitechnology node-stacking processes [5]. Therefore, developing interconnect methods, which can provide ultrafine-pitch capability and low-temperature process for 3-D systems, attracts continuous attention from industry [6].

Details

ISSN :
19427808 and 19324510
Volume :
9
Database :
OpenAIRE
Journal :
IEEE Nanotechnology Magazine
Accession number :
edsair.doi...........5f7032710e9bee1a6aab436a320b5c2a
Full Text :
https://doi.org/10.1109/mnano.2014.2373531