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VLSI implementation of visual block pattern truncation coding

Authors :
Yuan-Chen Liu
Yeong-Kang Lai
Tsung-Han Tsai
Liang-Gee Chen
Po-Cheng Wu
Source :
IEEE Transactions on Consumer Electronics. 44:490-499
Publication Year :
1998
Publisher :
Institute of Electrical and Electronics Engineers (IEEE), 1998.

Abstract

The paper proposes a pipelined architecture of a visual block pattern truncation coding algorithm to minimize the mean square error. Using this chip, the VBPTC based system can be applied to real-time encoding for moving pictures.

Subjects

Subjects :
Very-large-scale integration
Theoretical computer science
Coding algorithm
Mean squared error
Computer science
Media Technology
Electrical and Electronic Engineering
Chip
Algorithm
Coding tree unit
Block Truncation Coding
Color Cell Compression
Coding (social sciences)

Details

ISSN :
00983063
Volume :
44
Database :
OpenAIRE
Journal :
IEEE Transactions on Consumer Electronics
Accession number :
edsair.doi...........5b8a2e45d9cf087ba21a465cafa5dc88
Full Text :
https://doi.org/10.1109/30.713156
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