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1600V 4H-SiC UMOSFETs with Dual Buffer Layers
- Source :
- Proceedings. ISPSD '05. The 17th International Symposium on Power Semiconductor Devices and ICs, 2005..
- Publication Year :
- 2005
- Publisher :
- IEEE, 2005.
-
Abstract
- This paper presents the design and fabrication of 1600V 4H-SiC UMOSFETs with a novel dual buffer layer structure, which shortens the trench etching time by 2/spl times/ and achieves a high channel periphery density of 3330cm/cm/sup 2/ for low specific on-resistance. The device exhibits 50m/spl Omega/-cm/sup 2/ of specific on-resistance with /spl sim/1/spl mu/m of channel length, and could be further reduced with
Details
- Database :
- OpenAIRE
- Journal :
- Proceedings. ISPSD '05. The 17th International Symposium on Power Semiconductor Devices and ICs, 2005.
- Accession number :
- edsair.doi...........562625f74fc499922d9daf7e606f1ee9
- Full Text :
- https://doi.org/10.1109/ispsd.2005.1487988