Back to Search Start Over

Dual damascene patterning of polymer interlayer dielectrics

Authors :
Swaminathan Sivakumar
Makarem A. Hussein
Jihperng Leu
Ruth A. Brain
Robert B. Turkot
V. Singh
Source :
Proceedings of the IEEE 2003 International Interconnect Technology Conference (Cat. No.03TH8695).
Publication Year :
2004
Publisher :
IEEE, 2004.

Abstract

We unveil an innovative and manufacturable process technique to pattern dual damascene structures in polymer interlayer dielectric (ILD) without the need for either a permanent hardmask or an embedded etch stop (ES) layer. We introduce a sacrificial hardmask (SAM) and a sacrificial via fill (SAVIL) material to enable the patterning process. Since the hardmask is sacrificial, it is removed at the end of the patterning process without compromising the overall dielectric value of the ILD. The utilization of the SAVIL material provided the trench lithography step with a hole-free, and planar substrate. We demonstrate patterning of dual damascene structures using SAM/SAVIL in a via-first integration scheme through a comparative patterning performance between the SAM/SAVIL-assisted dual damascene patterning and the dual hardmask approach used most in the industry.

Details

Database :
OpenAIRE
Journal :
Proceedings of the IEEE 2003 International Interconnect Technology Conference (Cat. No.03TH8695)
Accession number :
edsair.doi...........547f49993aa819d5225dfbc39bed9034
Full Text :
https://doi.org/10.1109/iitc.2003.1219704