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Gate Dielectric Integrity along the Road Map of CMOS Scaling including Multi-Gate Fet, TiN Metal Gate, and HfSiON High-k Gate Dielectric
- Source :
- 2006 IEEE International Reliability Physics Symposium Proceedings.
- Publication Year :
- 2006
- Publisher :
- IEEE, 2006.
-
Abstract
- Future CMOS technology generations may implement multi-gate architectures according to S. M. Kim et al. (2004), D Ha et al. (2004), S.-Y. Kim et al. (2005), W.-S. Liao et al. (2005), S. Maeda et al. (2004), N. Collaert et al. (2005),and C. Jahan et al. (2005), together with a change from SiO2-based to high-k gate dielectrics and a change from poly-silicon to metal gate. The purpose of this work is to identify the influences of multi-gate architecture and metal gate on gate dielectric reliability and to demonstrate the dielectric reliability trend along the road map towards a CMOS process using triple gate architecture, metal gate, and HfSiON gate dielectric
- Subjects :
- Materials science
business.industry
Gate dielectric
Electrical engineering
chemistry.chemical_element
Hardware_PERFORMANCEANDRELIABILITY
Dielectric
CMOS
chemistry
Hardware_GENERAL
MOSFET
Hardware_INTEGRATEDCIRCUITS
Optoelectronics
Breakdown voltage
Hardware_ARITHMETICANDLOGICSTRUCTURES
business
Metal gate
Tin
Hardware_LOGICDESIGN
High-κ dielectric
Subjects
Details
- Database :
- OpenAIRE
- Journal :
- 2006 IEEE International Reliability Physics Symposium Proceedings
- Accession number :
- edsair.doi...........545d69f471cce9d27fe664de8a80214a