Impacts of Through-Silicon Vias on Total-Ionizing-Dose Effects and Low-Frequency Noise in FinFETs

Total-ionizing-dose (TID) effects and low-frequency noise are evaluated in advanced bulk nMOS and pMOS FinFETs with SiO2/HfO2 gate dielectrics. Otherwise identical devices built with and without through-silicon via (TSV) integration exhibit threshold voltage shifts of less than 25 mV and changes in maximum transconductance of less than 1% up to 2 Mrad(SiO2). TSV integration negligibly impacts threshold shifts and degradation of subthreshold swing and $I_{\mathrm{\scriptscriptstyle ON}}/I_{\mathrm{\scriptscriptstyle OFF}}$ ratios. Similar low-frequency noise magnitudes and frequency dependencies are observed before and after TID irradiation for each device type. Effective densities of the near-interfacial electron traps responsible for the noise in the nMOS devices increase as the surface potential moves toward midgap, while effective densities of the hole traps that cause the noise in the pMOS devices increase as the surface potential moves toward the valence band edge.