Particle-induced distortion in extreme ultraviolet lithography reticles during exposure chucking

Since the goal of extreme ultraviolet lithography is to produce circuit patterns with critical dimensions less than 65 nm, a key to its success will be to identify and minimize the major sources of image placement (IP) error at the wafer. Two sources of IP error are in-plane distortion (IPD) and out-of-plane deformation (OPD) of the patterned reticle during chucking in the exposure tool. Among the many possible causes of IPD and OPD is particle contamination. Small pieces of debris lodged between the reticle and chuck have the potential to distort the pattern that is transferred to the device wafer. Such distortions may consume an unduly large portion of the error budget allotted to image placement. In order to limit these IP errors, it is first necessary to gain a thorough understanding of the behavior of a particle trapped during the chucking process. This article describes the techniques that were used to study these trapped particles and their potential effects on pattern placement accuracy.