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Cache-Related Preemption Delay Analysis for Multilevel Noninclusive Caches
- Source :
- ACM Transactions on Embedded Computing Systems. 13:1-29
- Publication Year :
- 2014
- Publisher :
- Association for Computing Machinery (ACM), 2014.
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Abstract
- With the rapid growth of complex hardware features, timing analysis has become an increasingly difficult problem. The key to solving this problem lies in the precise and scalable modeling of performance-enhancing processor features (e.g., cache). Moreover, real-time systems are often multitasking and use preemptive scheduling, with fixed or dynamic priority assignment. For such systems, cache related preemption delay (CRPD) may increase the execution time of a task. Therefore, CRPD may affect the overall schedulability analysis. Existing works propose to bound the value of CRPD in a single-level cache. In this article, we propose a CRPD analysis framework that can be used for a two-level, noninclusive cache hierarchy. In addition, our proposed framework is also applicable in the presence of shared caches. We first show that CRPD analysis faces several new challenges in the presence of a multilevel, noninclusive cache hierarchy. Our proposed framework overcomes all such challenges and we can formally prove the correctness of our framework. We have performed experiments with several subject programs, including an unmanned aerial vehicle (UAV) controller and an in-situ space debris monitoring instrument. Our experimental results suggest that we can provide sound and precise CRPD estimates using our framework.
Details
- ISSN :
- 15583465 and 15399087
- Volume :
- 13
- Database :
- OpenAIRE
- Journal :
- ACM Transactions on Embedded Computing Systems
- Accession number :
- edsair.doi...........430b32ab16c4c5305b57caa68d923a61