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A Vernier Over Sampling and Alignment technique for Gb/s Serial Communication

Authors :
K. Omote
J. Okamura
K. Shimizu
Source :
2005 IEEE Asian Solid-State Circuits Conference.
Publication Year :
2005
Publisher :
IEEE, 2005.

Abstract

A new circuit technique of deserializing for Gb/s serial communication such as "digital visual interface" for PC and "high-definition multimedia interface" for CE application is proposed. Vernier over sampling and alignment technique can achieve both low power and low bit error rate at high frequency operation in DVI/HDCP digital graphic communication receiver. VOSA circuit is simple and mostly digitally controlled, therefore it is robust and portable. Demonstrating VOSA performance, the circuit was implemented to the DVI digital flat panel communication link receiver as an analog front-end (AFE) with the industry standard 0.25mum CMOS process

Details

Database :
OpenAIRE
Journal :
2005 IEEE Asian Solid-State Circuits Conference
Accession number :
edsair.doi...........41e41c90d8da75d38e72735bdb084aef