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An efficient power routing technique to resolve the current crowding effect in the power grid structure of gate arrays

Authors :
I. Yamamoto
Chingchi Yao
S. Nomura
Source :
Proceedings Seventh Annual IEEE International ASIC Conference and Exhibit.
Publication Year :
2002
Publisher :
IEEE, 2002.

Abstract

This paper is the first report on the detrimental current crowding effect in the power grid structure of gate arrays. Innovative solutions to the problems are described. The proposed power routing technique utilizes flexible metalization with respect to the power pad locations. The resulting structure improves gate utilization and prevents metal electromigration. The CAD physical design flow for implementation in a 0.5 /spl mu/m CMOS sea-of-gate array is described. >

Details

Database :
OpenAIRE
Journal :
Proceedings Seventh Annual IEEE International ASIC Conference and Exhibit
Accession number :
edsair.doi...........3db738af97484f609db5bf927b977f2b
Full Text :
https://doi.org/10.1109/asic.1994.404592