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A one-transistor memory cell with nondestructive readout
- Source :
- 1973 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.
- Publication Year :
- 1973
- Publisher :
- IEEE, 1973.
-
Abstract
- This paper will describe a dynamic high-speed three-line access memory cell which occupies the area of a single bipolar transistor. New design is compatible with bipolar processing, with the addition of one extra masking step.
- Subjects :
- Hardware_MEMORYSTRUCTURES
Computer science
Heterostructure-emitter bipolar transistor
business.industry
Schottky barrier
Bipolar junction transistor
Transistor
Electrical engineering
Schottky diode
Hardware_PERFORMANCEANDRELIABILITY
Metal–semiconductor junction
law.invention
Non-volatile memory
Current injection technique
Memory cell
law
Hardware_INTEGRATEDCIRCUITS
Electronic engineering
business
Ohmic contact
Hardware_LOGICDESIGN
Subjects
Details
- Database :
- OpenAIRE
- Journal :
- 1973 IEEE International Solid-State Circuits Conference. Digest of Technical Papers
- Accession number :
- edsair.doi...........3db1044ba5995d2fee25dbf91053ecb6