A X-Band Linearized LNA with Low Power Post-Distortion Technology

A X-Band linearized low noise amplifier is presented in a 130 nm CMOS process. The modified post-distortion technique is employed to reduce the extra power consumption and improve the linearity. In this design, the LNA with an unsaturated auxiliary NMOS transistor achieves the suppression of the nonlinearity. Two-stage common source network is used to enhance the gain and achieves X-band bandwidth in the proposed LNA. With low extra 0.07 mW power consumption of the post-distortion network, the simulated results of the implemented LNA show that IIP3 has been boosted to −5~3.55 dBm in the range of 8–12 GHz. The LNA has a peak gain of 14.3 dB and a minimum noise figure of 1.86 dB. It consumes a total 5.79 mW power consumption from a 600 mV supply voltage. The total chip area is 0.69 mm2.