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A true single-phase-clock dynamic CMOS circuit technique
- Source :
- IEEE Journal of Solid-State Circuits. 22:899-901
- Publication Year :
- 1987
- Publisher :
- Institute of Electrical and Electronics Engineers (IEEE), 1987.
-
Abstract
- The authors describe two dynamic circuit techniques, using only a single-phase clock which is never inverted. This class of circuits has the advantages of simple clock distribution, small area for clock lines reduced clock skew problems, and high speed. Several examples are demonstrated.
- Subjects :
- Synchronous circuit
Clock signal
Computer science
Static timing analysis
Clock gating
Digital clock manager
Integrated circuit
Clock skew
Synchronization
law.invention
Computer Science::Hardware Architecture
Logic synthesis
Clock angle problem
CMOS
Clock domain crossing
law
Electronic engineering
Electrical and Electronic Engineering
CPU multiplier
Electronic circuit
Asynchronous circuit
Subjects
Details
- ISSN :
- 00189200
- Volume :
- 22
- Database :
- OpenAIRE
- Journal :
- IEEE Journal of Solid-State Circuits
- Accession number :
- edsair.doi...........385f2e57c04606d6fad4018893a77132