0.5 V CMOS logic delivering 200 million 8*8 bit multiplications/s at less than 100 fj based on a 50nm T-gate SOI technology

High-performance CMOS logic at a very low voltage of 0.5 V can deliver 150 million 8/spl times/8 multiplications/s at an energy level of only 30fJ, if 0.35 /spl mu/m SOI technology is enhanced with self-aligned 50 mm T-Gate transistors, if a new adder with a differential Manchester chain including special accelerators and if the DIGILOG multiplier, a leading-one-first pseudo-log multiplier with complexity order (n) are optimized simultaneously.