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Qualitative analysis for state/event fault trees using formal model checking

Authors :
Jiang Quan
Zhu Chun-ling
Wang Siqi
Source :
Journal of Systems Engineering and Electronics. 30:959
Publication Year :
2019
Publisher :
Institute of Electrical and Electronics Engineers (IEEE), 2019.

Abstract

A state/event fault tree (SEFT) is a modeling technique for describing the causal chains of events leading to failure in software-controlled complex systems. Such systems are ubiquitous in all areas of everyday life, and safety and reliability analyses are increasingly required for these systems. SEFTs combine elements from the traditional fault tree with elements from state-based techniques. In the context of the real-time safety-critical systems, SEFTs do not describe the time properties and important time-dependent system behaviors that can lead to system failures. Further, SEFTs lack the precise semantics required for formally modeling time behaviors. In this paper, we present a qualitative analysis method for SEFTs based on transformation from SEFT to timed automata (TA), and use the model checker UPPAAL to verify system requirements' properties. The combination of SEFT and TA is an important step towards an integrated design and verification process for real-time safety-critical systems. Finally, we present a case study of a powerboat autopilot system to confirm our method is viable and valid after achieving the verification goal step by step.

Details

ISSN :
10044132
Volume :
30
Database :
OpenAIRE
Journal :
Journal of Systems Engineering and Electronics
Accession number :
edsair.doi...........3005fb9f30f11c8e164640ce63f82a46
Full Text :
https://doi.org/10.21629/jsee.2019.05.13