Investigation of a latch-up immune silicon controlled rectifier for robust ESD application

A latch-up immune robust SCR with an N+ top layer and an additional Nwell region (Nwell2) is proposed in this paper. The N+ top layer and Nwell2 divide the original SCR into three new SCRs with sharing emitter, which provide the deeper ESD current (I esd ) path to improve the holding voltage (V h ) and failure current (I t2 ). The relation between V h and base-concentration (N b ) for LVTSCR is given to provide an in-depth insight into the mechanism for enhancing V h by changing N b . The N+ top layer and NWELL2 form three base regions (B1, B2 and B3) with different concentration to optimize the I ESD distribution and V h . The longer ESD current path improves the V h by reducing the current gain. The deeper current distribution makes the total temperature is endured by inner lattice instead of surface lattice, which improves the I t2 . DC and dynamic TLP simulation results show the V h = 5.3 V of proposed SCR is achieved with a higher failure current (I t2 ) of 1.68e-2A/μm.