Testing and optimization of Recurrent Signal Processor

This paper covers the optimization research for the novel data-flow computational architecture called Hybrid Architecture of Recurrent Signal Processor. The testing methodology, based on the shift towards Test-Driven Development of architecture models, is provided. We cover the toolset developed to unify the methodology for both software and hardware models. The testing results are analyzed, and the issues are formulated. We propose the pipeline extension by splitting our largest component down. We show the new pipeline utilization ratio this solution provides.