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Development of a 3D measuring system for semiconductor patterned wafers

Authors :
K. Nakajima
R. Tsutsumi
T. Tomoda
Y. Sakaue
N. Kosaka
Source :
[Proceedings] IECON '90: 16th Annual Conference of IEEE Industrial Electronics Society.
Publication Year :
2002
Publisher :
IEEE, 2002.

Abstract

A fast, automated measuring system has been developed which provides 3D information about semiconductor wafer patterns nondestructively from scanning electron microscope images. The 3D measurement is conducted in two different ways for different patterns: one is pattern height measurement using only one image for trapezoidal patterns, while the other is height profile measurement for smoothly curved surfaces. The system proved capable of measuring 3D shape sufficiently fast (within 5 s) and with sufficiently good accuracy to control the semiconductor wafer process line. >

Details

Database :
OpenAIRE
Journal :
[Proceedings] IECON '90: 16th Annual Conference of IEEE Industrial Electronics Society
Accession number :
edsair.doi...........2c5ff69360c86ecac8d943efc1d12da2
Full Text :
https://doi.org/10.1109/iecon.1990.149190