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A 12.8 GB/S Daisy Chain-Based Downlink I/F Employing Spectrally Compressed Multi-Band Multiplexing for High-Bandwidth and Large-Capacity Storage Systems
- Source :
- VLSI Circuits
- Publication Year :
- 2018
- Publisher :
- IEEE, 2018.
-
Abstract
- This paper proposes a prototype downlink I/F employing a tapered-BW daisy-chained topology enabled by a proposed SCM2 technique to exploit the low throughput of NAND I/O, which allows a NAND controller to handle 32 NAND PKGs on a single I/F channel. The fabricated I/F achieved 12.8 Gb/s with BER of 10−12 while consuming 252.1 mW for a TX and 375.7 mW for four RXs. The FoM is 409.6 PKG·Gb/s.
- Subjects :
- Orthogonal frequency-division multiplexing
Computer science
020208 electrical & electronic engineering
Telecommunications link
0202 electrical engineering, electronic engineering, information engineering
Electronic engineering
NAND gate
Topology (electrical circuits)
02 engineering and technology
Daisy chain
Throughput (business)
Multiplexing
Communication channel
Subjects
Details
- Database :
- OpenAIRE
- Journal :
- 2018 IEEE Symposium on VLSI Circuits
- Accession number :
- edsair.doi...........2c2b38697142eadc86c7275afd407532
- Full Text :
- https://doi.org/10.1109/vlsic.2018.8502340