Degradation and capacitance: voltage hysteresis in CdTe devices

CdS/CdTe photovoltaic solar cells were made on two different transparent conducting oxide (TCO) structures in order to identify differences in fabrication, performance, and reliability. In one set of cells, chemical vapor deposition (CVD) was used to deposit a bi-layer TCO on Corning 7059 borosilicate glass consisting of a F-doped, conductive tin-oxide (cSnO2) layer capped by an insulating (undoped), buffer (iSnO2) layer. In the other set, a more advanced bi-layer structure consisting of sputtered cadmium stannate (Cd2SnO4; CTO) as the conducting layer and zinc stannate (Zn2SnO4; ZTO) as the buffer layer was used. CTO/ZTO substrates yielded higher performance devices however performance uniformity was worse due to possible strain effects associated with TCO layer fabrication. Cells using the SnO2-based structure were only slightly lower in performance, but exhibited considerably greater performance uniformity. When subjected to accelerated lifetime testing (ALT) at 85 - 100 °C under 1-sun illumination and open-circuit bias, more degradation was observed in CdTe cells deposited on the CTO/ZTO substrates. Considerable C-V hysteresis, defined as the depletion width difference between reverse and forward direction scans, was observed in all Cu-doped CdTe cells. These same effects can also be observed in thin-film modules. Hysteresis was observed to increase with increasing stress and degradation. The mechanism for hysteresis is discussed in terms of both an ionic-drift model and one involving majority carrier emission in the space-charge region (SCR). The increased generation of hysteresis observed in CdTe cells deposited on CTO/ZTO substrates suggests potential decomposition of these latter oxides when subjected to stress testing.