Application of an image processing architecture for the Solar Orbiter SPICE instrument

The ongoing development of avionics to support the Spectral Imaging of the Coronal Environment (SPICE) Electronics Box (SEB) program as part of the European Space Agency's (ESA) Solar Orbiter mission has resulted in the development of an Image Processing Field Programmable Gate Array (FPGA) (IPF). The IPF is a single FPGA containing functions to communicate with a Front End Electronics (FEE) assembly/extreme ultraviolet camera, to apply data corrections on incoming pixels, and to compress the final image product for transmission to the ground. The IPF is used as part of a larger science “observation” campaign envisaged as a series of “studies” that are scheduled using a macro execution engine maintained by the Flight Software (FSW). A macro is a lookup table (LUT) stored in memory which contains a series of SPICE commands with relative time tags for each, which determines when each command is executed. This paper discusses the design and architecture of the IPF and associated controlling software employed to meet the various engineering and science requirements of the SPICE instrument.