Design and implementation of application‐specific instruction‐set processor design for high‐throughput multi‐standard wireless orthogonal frequency division multiplexing baseband processor

The two implementation choices for the baseband part of wireless radios are the application-specific platforms (e.g. application-specific integrated circuits (ASICs)) and the programmable processors (e.g. digital signal processors (DSPs)). An application-specific instruction-set processor (ASIP) is a customised processor that bridges the gap between the two platforms. In this work, a novel implementation of the signal processing part of an orthogonal frequency division multiplexing (OFDM) baseband processor using three ASIPs is presented. The ASIPs provide novel architectures for the symbol chain, including fast Fourier transform, channel estimation subsystem and synchronisation subsystem. This design provides a close to DSPs level of flexibility, making it suitable for supporting all the modes of a large number of OFDM standards. In the meantime, the system maintains a performance level comparable to ASICs. This is demonstrated by providing post-layout results for 0.13 μm Taiwan semiconductor manufacturing company complementary metal-oxide semiconductor technology.