High speed constant-breadth adder-plantlet design using modified full adder

Traditional, constant breadth Adder Plantlet “AP” structure proposed from the full-breadth AP setup utilizing straight or post-reduction technique. In straight or post reduction, a single lower request bit of every adder yield of full-breadth adder Plantlet is post-shortened. Then the circumstance of straight-reduction, lower arrange bits of conclusive phase adder yield remain shortened. Both these techniques don’t give a proficient structure. In this concise, a new plan is displayed to acquire fixed-breadth AP prearrangement utilizing shortened information. An inclination estimation process dependent on probabilistic procedure is introduced to make up for the reduction mistake. The proposed constant-breadth AP structure for input-vector sizes 8 and 16 area-postpone item putting something aside for word-length sizes “8, 12, 16” individually. What’s more, figures the yield nearly with same precision post-shortened constant-breadth AP, the most elevated exactness in the middle of the current constant-breadth AP. To speed up the adder plantlet operation we will use “Modified Full adder” (mux based full adder) for high speed operation.