Back to Search Start Over

Vertical GAAFETs for the Ultimate CMOS Scaling

Authors :
Aaron Thean
Geert Eneman
Anabela Veloso
Kristin De Meyer
Praveen Raghavan
P. Schuddinck
Trong Huynh Bao
Diederik Verkest
Abdelkarim Mercha
D. Yakimets
Nadine Collaert
Marie Garcia Bardon
Source :
IEEE Transactions on Electron Devices. 62:1433-1439
Publication Year :
2015
Publisher :
Institute of Electrical and Electronics Engineers (IEEE), 2015.

Abstract

In this paper, we compare the performances of FinFETs, lateral gate-all-around (GAA) FETs, and vertical GAAFETs (VFETs) at 7-nm node dimensions and beyond. Comparison is done at ring oscillator level accounting not only for front-end of line devices but also for interconnects. It is demonstrated that FinFETs fail to maintain the performance at scaled dimensions, while VFETs demonstrate good scalability and eventually outperform lateral devices both in speed and power consumption. Lateral GAAFETs show better scalability with respect to FinFETs but still consume 35% more energy per switch than VFETs if made under 5-nm node design rules.

Details

ISSN :
15579646 and 00189383
Volume :
62
Database :
OpenAIRE
Journal :
IEEE Transactions on Electron Devices
Accession number :
edsair.doi...........2575daa047c78d2c026d7c80b16793f8
Full Text :
https://doi.org/10.1109/ted.2015.2414924