A Low-Hardware-Complexity Rate Control Scheme for High Efficiency Video Coding

High-efficiency video coding (HEVC) is the emerging video coding standard, which provides a coding bit-rate reduction of up to 50% compared to the previous-generation video compression standard, H.264/AVC. A wide variety of video coding applications are applied in mobile devices; they suffer from the limited time-amending transmission bandwidth during data transmission. We present a low-hardware-complexity HEVC ME design that is not only aware of transmission bandwidth changes but capable of acceptable coding performance. In comparison with the HEVC test model (HM-16.6), the introduced HEVC ME scheme with rate-control capability can be realized in VLSI.