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Wear-aware Memory Management Scheme for Balancing Lifetime and Performance of Multiple NVM Slots

Authors :
Linfeng Cheng
Lei Zhang
Duo Liu
Chunhua Xiao
Weichen Liu
Source :
MSST
Publication Year :
2019
Publisher :
IEEE, 2019.

Abstract

Emerging Non-Volatile Memory (NVM) has many advantages, such as near-DRAM speed, byte-addressability, and persistence. Modern computer systems contain many memory slots, which are exposed as a unified storage interface by shared address space. Since NVM has limited write endurance, many wear-leveling techniques are implemented in hardware. However, existing hardware techniques can only effective in a single NVM slot, which cannot ensure wear-leveling among multiple NVM slots. This paper explores how to optimize a storage system with multiple NVM slots in terms of performance and lifetime. We show that simple integration of multiple NVMs in traditional memory policies results in poor reliability. We also reveal that existing hardware wear-leveling technologies are ineffective for a system with multiple NVM slots. In this paper, we propose a common wear-aware memory management scheme for in-memory file system. The proposed memory scheme enables wear-aware control of NVM slot use which minimizes the cost of performance and lifetime. We implemented the proposed memory management scheme and evaluated their effectiveness. The experiments show that the proposed wear-aware memory management scheme can outperform wear-leveling effect by more than 2600x, and the lifetime of NVM can be prolonged by 2.5x, the write performance can be improved by up to 15%.

Details

Database :
OpenAIRE
Journal :
2019 35th Symposium on Mass Storage Systems and Technologies (MSST)
Accession number :
edsair.doi...........24e8a8c331f1dc26acf68ae31cf1efa7
Full Text :
https://doi.org/10.1109/msst.2019.000-7