Si/SiGe hetero-structure tunneling field effect transistors with in-situ doped SiGe source

Tunneling field-effect transistors (TFETs) were fabricated from compressively strained Si/SiGe wafers with a stepped gate to enhance band to band tunneling. In-situ highly p-doped Si 0.5 Ge 0.5 was used as source and As-implanted Si as drain. For the gate stack, conformal HfO 2 (k = 22) and TiN were deposited, which resulted in an effective oxide thickness (EOT) of ∼ 1nm. The TFET devices exhibit minimum point inverse subthreshold slopes as small as 65 mV/dec with applied back-gate voltage, and greatly suppressed ambipolar behavior. The improved performance compared to homogeneous planar devices is attributed to the superiority of the source/channel heterojunction and the shallow p-i junction.