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Performance Evaluation of In0.53Ga0.47As Esaki Tunnel Diodes on Silicon and InP Substrates

Authors :
Chris Hobbs
Sean L. Rommel
Wei-Yip Loh
Kausik Majumdar
Paul Thomas
R. Contreras-Guerrero
Abhinav Gaur
Enri Marini
Man Hoi Wong
Kunal Bhatnagar
Ravi Droopad
Matthew J. Filmer
Brian Romanczyk
D. Pawlik
Source :
IEEE Transactions on Electron Devices. 62:2450-2456
Publication Year :
2015
Publisher :
Institute of Electrical and Electronics Engineers (IEEE), 2015.

Abstract

In0.53Ga0.47As Esaki tunnel diodes grown by molecular beam epitaxy on an Si substrate via a graded buffer and control In0.53Ga0.47As Esaki tunnel diodes grown on an InP substrate are compared in this paper. Statistics are used as a tool to show peak-to-valley ratio for the III–V on Si sample and the control that perform similarly below $8.6 \times 10^{-10}$ cm $^{2}$ . The existence of a critical device area suggests the potential to utilize III–V on Si for other deeply scaled tunnel devices.

Details

ISSN :
15579646 and 00189383
Volume :
62
Database :
OpenAIRE
Journal :
IEEE Transactions on Electron Devices
Accession number :
edsair.doi...........206a17117100c233f3e03fa6a5c8a6bb