Efficient Implementation of Cryptographic Arithmetic Primitives Using Reversible Logic and Vedic Mathematics

The concept of IOT (Internet of Things) prevalent in the era, an enormous increase in the implementation of low resource devices with limited resources to implement various arithmetic primitives for cryptographic applications. Most of the National Institute of Standards and Technology NIST approved conventional security algorithms like the IDEA, RSA etc. involve simple operations like addition, multiplication and complex operations like addition-modulo, multiplication-modulo etc. such algorithms may not be routed to the low resource devices. Even though the NIST approved algorithms may be fitted into the low resource devices their erformance may be a concern. An extensive research has been carried out on designing the cryptographic arithmetic structures over the years, the arithmetic modules have been implemented using different design styles, logic, algorithms and aspects. In this paper the reversible logic and Vedic mathematics have been combined to implement efficient cryptographic arithmetic primitives. A considerable amount of improvement in the performance parameters like Area, power dissipation and delay have been analyzed by the implementation and synthesis.