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Equivalence Checking for Superconducting RSFQ Logic Circuits

Authors :
Huang Junying
Zhimin Zhang
Rongliang Fu
Source :
ACM Great Lakes Symposium on VLSI
Publication Year :
2021
Publisher :
ACM, 2021.

Abstract

Equivalence checking is a key component of the verification methodology for digital circuit designs. In this paper, we propose an equivalence checking framework for superconducting rapid single-flux-quantum (RSFQ) logic circuits which include acyclic circuits and bit-slice-based cyclic circuits. It consists of a structure checker and a logic checker. The structure checker is used to check whether the circuit meets the design rules of superconducting RSFQ logic circuits. The logic checker can be used to check whether two RSFQ gate-level circuits have the same logic function. For the logic checker, we propose a logic equivalence checking method based on logic cone partition. The circuit network is simplified layer by layer and iteratively partitioned into logic cones, each of which is verified by the SMT solver. The experimental results show the feasibility of our approach on superconducting RSFQ logic circuits.

Details

Database :
OpenAIRE
Journal :
Proceedings of the 2021 on Great Lakes Symposium on VLSI
Accession number :
edsair.doi...........1dbb29ac746b8813192dd3c8b493ff4a
Full Text :
https://doi.org/10.1145/3453688.3461486